Motorola MC68824 Manuals

Manuals and User Guides for Motorola MC68824. We have 1 Motorola MC68824 manual available for free PDF download: User Manual

Motorola MC68824 User Manual

Motorola MC68824 User Manual (158 pages)

Token-Passing Bus Controller

Brand: Motorola | Category: Controller | Size: 6.31 MB

Table of Contents

Table of Contents

2
List of Illustrations

11
- Features
  14
- Introduction
  14
- 150/051 Reference Model
  15
- IEEE 802.4 Token Bus Local Area Networks
  16
- IEEE Local Area Network Standards
  16
- Token Bus Operation
  16
- Options Within IEEE
  17
- Microprocessor System Bus Interface
  18
- Physical Layer Interface
  18
- Token Bus LAN Node
  18
  - Shared Memory
    19
  - Overview of TBC Functional Operation
    19
  - Command Structure Overview
    19
  - Frame Reception Overview
    19
  - Frame Transmission Overview
    20
  - Tables 2.1 TBC Private Area
    22
  - Next Station Address
    22
- Data Organization in Memory
  22
- TBC Private Area
  22
  - Previous Station Address
    24
  - Last Token-Rotation-Time
    24
  - Token Rotation Time at Start of Access Classes
    25
  - Target Token Rotation Time for Access Classes
    25
  - Token Rotation Time at Start of Ring Maintenance
    25
  - Target Rotation Time for Ring Maintenance
    25
  - Ring Maintenance Time Initial Value
    26
  - Source Routing - Source Segment/Bridge 10 (SID)
    26
  - Source Routing - Target Segment/Bridge 10 (TID)
    26
  - Segment Number Mask for Source Routing
    26
  - RX Frame Status Error Mask
    27
  - TX Queue Access Class Status
    27
  - TX Queue Access Class Pointers
    27
  - RX Queue Access Class Pointers
    27
  - Free Frame Descriptor Pointer
    28
  - Free Buffer Descriptor Pointer
    28
  - Group Address Mask
    28
  - Individual Address Mask
    29
  - Non-RWR Maximum Retry Limit
    29
  - RWR Maximum Retry Limit
    30
  - Slot Time
    30
  - Manufacturer Product Revision and 802.4 Standard Revision Number
    30
  - Transmitter Fault Count
    31
  - Private Area Function Code
    31
  - Private Area Pointer
    31
  - Parameters Initializing the Private Area
    31
  - Initial Pad Timer Preset (PTP)
    34
  - Initial In-Ring Desired
    34
  - Initial Address Length
    34
  - Response Destination Address Pointer
    34
  - Response Pointer
    34
  - Request with Response Pointer
    35
  - Command Parameter Area
    35
  - Interrupt Status Words
    36
    
    Interrupt Status Word 1
    38
  - Interrupt Masks
    40
  - Statistics
    40
    
    Number of Tokens Passed
    41
    
    Number of Tokens Heard
    41
    
    Number of Passes through no Successor 8
    41
    
    Number of Who Follows
    41
    
    Number of Token Pass Failed
    41
    
    Number of Frames too Long (>8K Bytes)
    41
    
    Number of no FD/BD Errors
    41
    
    Number of Overruns
    42
  - Modem Error Counters
    42
    
    Non-Silence
    42
    
    FCS Errors
    42
    
    E-Bit Errors
    42
    
    Frame Fragments
    42
  - DMA Dump Area
    42
    
    Commands
    44
  - Registers
    45
  - TBC Register Map
    46
  - Command Register (CR)
    46
  - Data Register (DR)
    46
  - Interrupt Vector Register (IV)
    47
  - Semaphore Register
    47
- Command Parameter Area
  56
- Initialization Table
  58
- Buffer Structures
  74
  - Linked Buffer Structures
    74
- TBC Queues
  75
- Frame Descriptor Format
  76
- Buffer Descriptor Format
  80
- Examples of Queues Status
  83
- Free Frame Descriptor and Buffer Descriptor Pools
  85
- MC68824 Signals
  93
- Data Strobe Control of Data Bus in Master Mode
  94
- Physical Layer Interface
  96
- Request Channel Encodings for MAC Mode (SMREQ = 1)
  97
- Indication Channel Encodings for MAC Mode (SMIND = 1)
  98
- Typical Station Management Sequence
  99
- Bus Operation
  102
- Host Processor Read Cycle with Two Wait States
  103
- Host Processor Write Cycle
  103
- Interrupt Acknowledge Cycle
  104
- Read Cycle and Slow Read Cycle
  105
- BEC Encoding Definitions
  106
- Write Cycle and Slow Write Cycle
  106
- TBC Write Cycle with HALT
  107
- TBC Read Cycle with Bus Error
  108
- TBC Read Cycle with Retry
  108
- TBC Read Cycle with Relinquish and Retry, Early and Late
  109
- Bus Arbitration
  110
- Bus Arbitration Unit State Diagram
  112
- Bus Timing Diagram
  113
- Tbcinterfaces
  114
- Electrical Specifications
  118
- Ordering Information and Mechanical Data
  132
- IEEE 802.4 Operation
  136
- Frame Formats and Addressing
  140

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