Page 3
System. It offers a modular structure for and other options can go in any slot of plug-in cards with a wide range of state, the HP 16500C or HP 16501A. You should timing, oscilloscope, and pattern generally begin installing cards starting generator capabilities.
Page 6
Triggering Intermodule Measurements File Management This User’s Guide shows you how to use the HP 16500C Logic Analysis System in your everyday debugging work. Concepts Chapter 1, “Triggering,” shows you how to set up the analyzer to trigger on the...
Page 7
HP logic analyzer. See Also For general information on setup and operation of the HP 16500C, see the HP 16500C /16501A Logic Analysis System User’s Reference. For information on programming the HP 16500C using a computer controller such as a workstation or personal computer, see the HP 16500C/16501A Logic Analysis System Programmer’s Guide.
2 Intermodule Measurements Intermodule Measurement Examples 2–4 To set up a group run of modules within the HP 16500C 2–4 To start a group run of modules from an external trigger source 2–6 To start an external instrument on command from a module within the HP 16500 and 16501 mainframe 2–8...
Page 9
To load system software 3–12 Using the LAN Interface 3–13 To set up the HP 16500C 3–14 To transfer data files from the HP 16500C system to your computer 3–16 To transfer graphics files from the HP 16500C system to your computer 3–18 viii...
Page 10
Contents 4 Concepts The Trigger Sequencer 4–3 The Inverse Assembler 4–10 Configuration Translation for Analyzer Modules 4–13 5 If You Have a Problem Analyzer Problems 5–3 Intermittent data errors 5–3 Unwanted triggers 5–3 No Setup/Hold field on format screen 5–4 No activity on activity indicators 5–4 Capacitive loading 5–4 No trace list display 5–5...
Page 13
Triggering As you begin to understand a problem in your system, you may realize that certain conditions must occur before the problem occurs. You can use sequential triggering to ensure that those conditions have occurred before the analyzer recognizes its trigger and captures information.
Triggering To store and time the execution of a subroutine To store and time the execution of a subroutine Most systems software of any kind is composed of a hierarchy of functions and procedures. During integration, testing, and performance evaluation, you will want to look at specific procedures to verify that they are executing correctly and that the implementation is efficient.
Page 15
Triggering To store and time the execution of a subroutine Example Suppose you want to trigger on entry to a routine called MY_SUB. You can define the address of MY_SUB in the Format menu, allowing you to reference the symbol name when setting up the trace specification. Assume that MY_SUB extends for 0A hex locations.
Triggering To trigger on the nth iteration of a loop To trigger on the nth iteration of a loop Traditional debugging requires print statements around the area of interest. This is not possible in most embedded systems designs. But, the analyzer allows you to view the system’s behavior when a particular event occurs.
Triggering To trigger on the nth recursive call of a recursive function To trigger on the nth recursive call of a recursive function Select the state analyzer Trigger menu. Define the terms CALL_ADD, F_START, and F_END to represent the called address of the recursive function, and the start and end addresses of the function.
Page 18
Triggering To trigger on the nth recursive call of a recursive function Triggering on the 22nd Call of a Recursive Function 1–7...
Triggering To trigger on entry to a function To trigger on entry to a function This sequence triggers on entry to a function only when it is called by one particular function. Select the state analyzer Trigger menu. Define the terms F1_START and F1_END to represent the start and end addresses of the calling function.
Page 20
Triggering To trigger on entry to a function Triggering on Entry to a Function 1–9...
Triggering To capture a write of known bad data to a particular variable To capture a write of known bad data to a particular variable The trigger specification ANDs the bad data on the data bus, write transaction on the status bus, and address of the variable on the address bus. Select the state analyzer Trigger menu.
Triggering To trigger on a loop that occasionally runs too long To trigger on a loop that occasionally runs too long This example assumes the loop normally executes in 14 µs. Select the state analyzer Trigger menu. Define terms LP_START, LP_END, and Timer1 to represent the start and end addresses of the loop, and the normal duration of the loop.
Triggering To verify that all stacks and registers are restored correctly before exiting a subroutine To verify that all stacks and registers are restored correctly before exiting a subroutine The exit code for a function will often contain instructions for deallocating stack storage for local variables and restoring registers that were saved during the function call.
Triggering To trigger after all status bus lines finish transitioning To trigger after all status bus lines finish transitioning In some applications, you will want to trigger a measurement when a particular pattern has become stable. For example, you might want to trigger the analyzer when a microprocessor’s status bus has become stable during the bus cycle.
Triggering To find the nth assertion of a chip select line To find the nth assertion of a chip select line Select the timing analyzer Trigger menu. Define the glitch/edge1 term to represent the asserting transition on the chip select line. You can rename the Edge1 term to make it correspond more closely to the problem domain, for example, to CHIP_SEL.
Triggering To verify that the chip select line of a memory chip is strobed after the address is stable To verify that the chip select line of a memory chip is strobed after the address is stable Select the timing analyzer Trigger menu. Define a term called ADDRESS to represent the address in question and the Edge1 term to represent the asserting transition on the chip select line.
Triggering To trigger when expected data does not appear on the data bus from a remote device when requested To trigger when expected data does not appear on the data bus from a remote device when requested Select the timing analyzer Trigger menu. Define a term called DATA to represent the expected data, the Edge1 term to represent the chip select line of the remote device, and the Timer1 term to identify the time limit for receiving expected data.
Page 28
Triggering To trigger when expected data does not appear on the data bus from a remote device when requested Triggering When I/O Data Not Returned 1–17...
Triggering To test minimum and maximum pulse limits To test minimum and maximum pulse limits Select the timing analyzer Trigger menu. Define the Edge1 term to represent the positive-going transition, and define the Edge2 term to represent the negative-going transition on the line with the pulse to be tested.
Page 30
Triggering To test minimum and maximum pulse limits Triggering when a Pulse Exceeds Minimum or Maximum Limits 1–19...
Triggering To detect a handshake violation To detect a handshake violation Select the timing analyzer Trigger menu. Define the Edge1 term to represent either transition on the first handshake line, and the Edge2 term to represent either transition on the second handshake line. You can rename these terms to match your problem, for example, to REQ and ACK.
Triggering To detect bus contention To detect bus contention In this sequencer setup, the trigger occurs only if both devices assert their bus transfer acknowledge lines at the same time. Select the timing analyzer Trigger menu. Define the Edge1 term to represent assertion of the bus transfer acknowledge line of one device, and Edge2 term to represent assertion of the bus transfer acknowledge line of the other device.
Cross-Arming Trigger Examples The following examples use cross arming to coordinate measurements between two instruments. The cross-arming is set up in the Arming Control menu (obtained by selecting Arming Control in the Trigger menu). When coordinating measurements between two or more analyzers, select Count Time so you can correlate the measurements made by the two analyzers.
Triggering To examine software execution when a timing violation occurs To examine software execution when a timing violation occurs The timing analyzer triggers when the timing violation occurs, and when it triggers, it also sets its “arm” level to true. When the state analyzer receives the arm signal, it triggers immediately on the present state.
Triggering To look at control and status signals during execution of a routine To look at control and status signals during execution of a routine The state analyzer will trigger on the start of the routine whose control and status signals are to be examined with finer resolution than once per bus cycle.
Page 37
The figure on the opposite page shows how intermodule bus arming signals are connected between modules inside the HP 16500C and HP 16501A. Note that any arm input can be driven by any slot, and that the port input line can drive any slot.
Page 38
Intermodule Measurements Intermodule Bus Block Functional Diagram 2–3...
Group Run field. To set up a group run of modules within the HP 16500C Modules are armed in the configuration tree by either an individual module or the Group Run field. When armed, a module begins searching for the input that will satisfy its trigger specification.
Page 40
Intermodule Measurements To set up a group run of modules within the HP 16500C The analyzer in slot B is armed when the oscilloscope in slot D finds its trigger condition. Oscilloscope Arms State Analyzer in Group Run 2–5...
To start a group run of modules from an external trigger source Connect the arm signal from the external instrument or system to the PORT IN BNC connector on the rear panel of the HP 16500 frame. Select the Intermodule menu. Set up the group run specification.
Page 42
Intermodule Measurements To start a group run of modules from an external trigger source Both the analyzer in slot B and the oscilloscope in slot D are armed when the PORT IN signal arrives. State Analyzer and Oscilloscope armed from PORT IN 2–7...
Set up the group run specification. See “To start a group run of modules within the HP 16500C” or “To start a group run of modules from an external trigger source.” Select PORT IN/OUT.
Page 44
Intermodule Measurements To start an external instrument on command from a module within the HP 16500 and 16501 mainframe The analyzer in slot B drives port out after finding its trigger. Driving the Port Out BNC in an Intermodule Measurement...
Intermodule Measurements To see the status of a module within an intermodule measurement To see the status of a module within an intermodule measurement Select the Intermodule menu. Find the name of the module under the “Modules” list, and read the status under the module name.
Page 46
Intermodule Measurements To see the status of a module within an intermodule measurement Both modules are running because neither has found its respective trigger condition. Module Status 2–11...
Intermodule Measurements To see time correlation of each module within an intermodule measurement To see time correlation of each module within an intermodule measurement Time correlation in the intermodule menu can help you see when the trigger occurred for each module and the relative time range of data captured by that module.
Page 48
Intermodule Measurements To see time correlation of each module within an intermodule measurement This portion of the bar indicates the relative time range of data acquired by this module. T indicates the time at which the trigger was found. Module Time Correlation 2–13...
You must have fully independent state and timing analyzers to make this type of measurement. For example, though the HP 16550A can be configured to use some of its channels for a state analyzer and some for a timing analyzer, it cannot present those analyzers independently for intermodule measurements.
Intermodule Measurements To capture the waveform of a glitch To capture the waveform of a glitch The following setup uses the triggering capability of the timing analyzer and the acquisition capability of the oscilloscope. Select the Intermodule Menu. Select the timing analyzer from the Modules list and set it to Group Run.
Intermodule Measurements To capture state flow showing how your target system processes an interrupt To capture state flow showing how your target system processes an interrupt Use an oscilloscope with a sample rate faster than the microprocessor clock rate to trigger on the asynchronous interrupt request. Select the Intermodule menu.
You can also use the pattern generators with the logic analyzer to test PC boards when no board-test system is available. The HP 16522A pattern generator for the HP 16500C avoids the inconvenience of having to stack several signal generators on top of each other, with all of the cable connections required for those signal generators.
Intermodule Measurements To use a state analyzer to trigger timing analysis of a count-down on a set of data lines To use a state analyzer to trigger timing analysis of a count-down on a set of data lines Select the Intermodule menu. Select the state analyzer from the Modules list and set it to Group Run.
Intermodule Measurements To monitor the activity of two coprocessors in a target system To monitor the activity of two coprocessors in a target system Debugging coprocessor systems can be a complex task. Replicated systems and contention for shared resources increase the potential problems. Using two state analyzers with preprocessors can make it much easier to discover the source of such problems.
Page 55
Intermodule Measurements To monitor the activity of two coprocessors in a target system Select Group Run from the upper right corner of the display. After the measurement is complete, you can interleave the trace lists of both state analyzers to see the activity executed by both coprocessors during related clock cycles.
The Mixed Display mode allows you to show state listings and waveforms together on screen, if all were obtained by modules within the HP 16500C and 16501A frame. State listings are shown at the top of the screen and waveform displays are shown at the bottom. You can interleave state listings from two analyzers at the top of the screen, if desired.
In the first case, you might have two HP 16550A analyzers configured in a group run; in the second, you might have a single HP 16550A configured as two state analyzers. The interleaved trace lists are shown as a time-correlated, state-to-state display.
Page 58
Interleaved states are shown in yellow with line numbers indented from those of the primary analyzer. Interleaved Trace Lists on the HP 16550A See Also “To set up a group run of modules within the HP 16500C” in this chapter. 2–23...
You won’t need to do this if the two measurement modules for which you want mixed display are really part of the same module. For example, you might have an HP 16550A state/timing analyzer configured as two separate analyzers, one a state analyzer, the other a timing analyzer. You can use mixed display to view the timing analyzer waveform with the trace lists from the state analyzer.
Page 60
Mixed Display using the HP 16550A and HP 16532A See Also “To set up a group run of modules within the HP 16500C” in this chapter. “Skew Adjustment” in this chapter. 2–25...
Skew Adjustment You can modify the skew or timing deviation between modules within the intermodule measurement. This allows you to compensate for any known delay of the system under test, or to compare two signals by first removing any displayed skew between the signal channels. Skew adjustments can correct module delays to within 2 ns of other modules.
Intermodule Measurements To adjust for minimum skew between two modules involved in an intermodule measurement To adjust for minimum skew between two modules involved in an intermodule measurement Connect an input signal from each module to the same signal. An ideal signal for testing skew is a single-shot signal with fast risetime. Such a signal simplifies triggering and makes it easier to correlate the input event between the modules.
Page 63
Intermodule Measurements To adjust for minimum skew between two modules involved in an intermodule measurement Record the differences shown by the two modules. You can use the X and O markers to measure the differences in delays. Select the Intermodule Menu. Select Skew, then enter a skew correction value for one of the modules using the knob or the keyboard.
Page 65
File Management A host computer such as a PC or UNIX workstation can enhance the HP 16500C in many ways. You can use the host to store configuration files or measurement results for later review. Screen images from the HP 16500C can be saved in bitmap files for inclusion in reports developed using word processors or desktop publishing tools.
Transferring Files Using the Flexible Disk Drive Because the flexible disk drive on the HP 16500C will read and write double-sided, double density or high-density disks in MS-DOS format, it is a useful tool for transferring images to and from IBM PC-compatible computers as well as other systems that can read and write MS-DOS format.
File Management To save a measurement configuration To save a measurement configuration You can save measurement configurations on a 3.5-inch disk or on the internal hard disk for later use. This is especially useful for automating repetitive measurements for production testing. Select System from the module field.
Page 68
File Management To save a measurement configuration Saving the Oscilloscope Configuration for Skew Testing If you want to save your file in a directory other than the root, you can select Change Directory from the disk operations field. Then type the name of the desired directory in the directory name field, or select it from the list of visible directories using the knob.
Also, configurations are slot dependent. If you save a configuration for a particular module, rearrange the modules within the HP 16500C, then try to reload the configuration, the configuration will not load.
Page 70
File Management To load a measurement configuration Loading Configuration for all HP 16500C Modules and the System 3–7...
To save a trace list in ASCII format To save a trace list in ASCII format Some HP 16500C displays, such as file lists and trace lists, contain columns of ASCII data that you may want to move to a PC for further manipulation or analysis.
Page 72
File Management To save a trace list in ASCII format 68332EVS State Listing Label ADDR CPU32 Mnemonic STAT __________ _____ ______________________________________ _________________ 406F4 ANDI.L #********,(A6)+ Opcode Fetch 0FF7A 0004 data write Data Write 0FF7C 06F6 data write Data Write 40992 BSR.B 0004093E Opcode Fetch...
File Management To save a menu or measurement as a graphic image To save a menu or measurement as a graphic image You can save menus and measurements to disk in one of four different graphics formats. Insert a DOS-formatted flexible disk in the flexible disk drive. Set up the menu whose image you want to capture, or run a measurement from which you want to save data.
Page 74
File Management To save a menu or measurement as a graphic image An Oscilloscope Display Saved as a TIF Image 3–11...
Repeat steps 7 and 8 for all files you need to update. If you have more than one disk from which you want to copy files, turn the knob after changing disks. This ensures that the HP 16500C will read the directory on the new disk.
System by making it look like a NFS (Network File System) node. Using NFS utilities for the PC or NFS on a UNIX workstation, you can transfer files to and from the HP 16500C as if it were a disk drive attached to your machine. The LAN Interface also creates virtual directories and files for measurement configurations and results, so you can store and retrieve these as though they were ordinary files.
To set up the HP 16500C To set up the HP 16500C You can set up the HP 16500C from the front panel, or via the LAN. To set up the system via the LAN, you can use one of three methods: •...
Page 78
In this case, the disk drive parameter, will be “INT0,” which indicates the hard disk. The slot number will be 2, because the HP 16550A is installed in slot B. To load the configuration file, enter the following command at the DOS prompt: C:\>...
To transfer data files from the HP 16500C system to your computer You can transfer data from the HP 16500C system to your PC or workstation by copying files. Data files in binary format are available in file locations \slot_x\data.raw. These binary files can be transferred to your computer and then reloaded into the HP 16500C system later.
Page 80
To transfer data files from the HP 16500C system to your computer Example You have an HP 16550A state/timing analyzer installed in slot C of your HP 16500C mainframe. The name of analyzer 1 of the HP 16550A is 68000_BUS. You have created some labels under analyzer 1 of the HP 16550A, including one called “addr_lo.”...
The file screenbw.epi is a black and white Encapsulated PostScript file in EPS version 3.0 format. You can also save the current display to a file on one of the local HP 16500C disk drives, using the Print to Disk function. You can then transfer the file from the HP 16500C drive to your computer.
Page 83
Concepts Understanding how the analyzer does its job will help you use it more effectively and minimize measurement problems. This chapter explains the general operation of the trigger sequencer and the inverse assembler. 4–2...
There are several different logic analyzers available for the HP 16500C. This discussion will focus on the HP 16550A, a 100-MHz state/500-MHz timing analyzer. Most HP logic analyzers will be similar, differing only in the number of available states, pattern resources, range resources, and acquisition memory depth.
Page 85
Concepts A sequence-else specification can branch to the same state... Sequence-advance specifications always to a previous state... branch to the next state. or a later state. Each state can have a unique storage specification. State Analyzer Sequencer with Four States Each state, except for the last, has two branch conditions.
Page 86
Concepts Sequence-Else Specification The sequence-else branch, sometimes called the “else if” branch or secondary branch, may branch to any other state, including the current state, a previous state, or a later state. The sequence-else specification looks like the following: Else on "<TERM>" go to level <sequence level> If the Sequence-Else specification is satisfied before the sequence-advance specification is satisfied, the sequencer begins at <sequence level>.
Page 87
Concepts you want to capture activity after the trigger is captured, define an additional sequence level and specify the desired storage qualification for post-trigger activity (for example, store “anystate”). Analyzer Resources The sequence-advance, sequence-else, storage, and trigger-on specifications are set by a combination of up to 10 pattern terms, 2 range terms, and 2 timers.
Page 88
The following table shows how resources are divided in the HP 16550A. Remember that some resources may not be available, depending on the analyzer configuration. For example, if you are using the analyzer as a state analyzer, the Edge1 and Edge2 resources are not available.
Page 89
Concepts Table 4-1 HP 16550A Resource Division Group Pair Resource Operation Resource Pair Links Group Link Group Pair 1 Off, On, Negate Combine resources Off, On, Negate within Pair 2 Off, On, Negate pairs Off, In Range, Out of Range...
Page 90
5/6. Trying to define a range across pods 2/3, 4/5, or 1/6 will not work. The Timing Analyzer When you configure the HP 16550A as a timing analyzer, the trigger sequencer is similar. However, there are between 1 and 10 states available. The trigger term is always the last state. There are two additional resources, Edge1 and Edge2.
The Inverse Assembler When the analyzer captures a trace, it captures binary information. The analyzer can then present this information in binary, octal, decimal, hexadecimal, or ASCII. Or, if given information about the meaning of the data captured, the analyzer can inverse assemble the trace.
Page 92
Concepts The inverse assembler synchronizes at the first line in the trace list... not at the cursor position Inverse Assembly Synchronization If you roll the trace list to a new position and press Invasm again, the inverse assembler repeats the above process. However, it does not work backward in the trace list from the starting position.
Page 93
Thus, you can have symbols in the address field without inverse-assembled data and status. The HP E2450A symbol download utility allows you to download symbols from OMF (Object Module Format) files.
HP 16500C Logic Analysis System to gain additional measurement features. Or, you might want to use a configuration file from one HP 16500C system on another HP 16500C with a different analyzer module. But, the analyzer configuration files cannot be transferred directly from one type of analyzer to the next.
Page 95
The onscreen messages given by the translator will help you identify which analyzer pods must be swapped. If you are using an HP preprocessor, the Preprocessor User’s Guide may contain information showing the cable connections for different analyzer modules.
Page 96
Concepts When you move a configuration file from one analyzer to another, the trace data from previous measurements is not moved. If you need to store trace data for future reference, see “To save a trace list in ASCII format” in chapter 3. 4–15...
Page 99
If You Have a Problem Occasionally, a measurement may not give the expected results. If you encounter difficulties while making measurements, use this chapter to guide you through some possible solutions. Each heading lists a problem you may encounter, along with some possible solutions. Error messages which may appear on the logic analyzer are listed below in quotes “...
Analyzer Problems This section lists general problems that you might encounter while using the analyzer. Intermittent data errors This problem is usually caused by poor connections, incorrect signal levels, or marginal timing. Remove and reseat all cables and probes; ensure that there are no bent pins on the preprocessor interface or poor probe connections.
No Setup/Hold field on format screen No Setup/Hold field on format screen The HP 16540 and 16541 (A and D models), or HP 16542A logic analyzer cards are not calibrated. Refer to your logic analyzer reference manual for procedures to calibrate the cards.
If You Have a Problem No trace list display No trace list display If there is no trace list display, it may be that your analysis specification is not correct for the data you want to capture, or that the trace memory is only partially filled.
Preprocessor Problems This section lists problems that you might encounter when using a preprocessor. If the solutions suggested here do not correct the problem, you may have a defective preprocessor. Refer to the User’s Guide for your preprocessor for test procedures. Contact your local Hewlett-Packard Sales Office if you need further assistance.
If You Have a Problem Slow clock Slow clock If you have the preprocessor interface hooked up and running and observe a slow clock or no activity from the interface board, the +5 V supply coming from the analyzer may not be getting to the interface board. To check the +5 V supply coming from the analyzer, disconnect one of the logic analyzer cables from the preprocessor and measure across pins 1 and 2 or pins 39 and 40.
Page 105
If You Have a Problem Erratic trace measurements Try doing a full reset of the target system before beginning the measurement. Some preprocessor designs require a full reset to ensure correct configuration. Ensure that your target system meets the timing requirements of the processor with the preprocessor probe installed.
Inverse Assembler Problems This section lists problems that you might encounter while using the inverse assembler. When you obtain incorrect inverse assembly results, it may be unclear whether the problem is in the preprocessor or in your target system. If you follow the suggestions in this section to ensure that you are using the preprocessor and inverse assembler correctly, you can proceed with confidence in debugging your target system.
If You Have a Problem Inverse assembler will not load or run Check the activity indicators for status lines locked in a high or low state. Verify that the STAT, DATA, and ADDR format labels have not been modified from their default values. These labels must remain as they are configured by the configuration file.
Intermodule Measurement Problems Some problems occur only when you are trying to make a measurement involving multiple modules. An event wasn’t captured by one of the modules If you are trying to capture an event that occurs very shortly after the event that arms one of the measurement modules, it may be missed, due to internal analyzer delays.
The default calibration file for the logic analyzer was loaded. The logic analyzer must be calibrated when using HP 16540A/D, HP 16541A/D or HP 16542A cards. Refer to the Logic Analyzer Reference for procedures to calibrate the master clocking system, and ensure that the “cal factors” file is saved.
“Measurement Initialization Error” This error occurs when you have installed the cables incorrectly for one or two HP 16550A logic analysis cards. The following diagrams show the correct cable connections for one-card and two-card installations. Ensure that your cable connections match the drawing, then repeat the measurement.
“Slow or Missing Clock” This error message might occur if the logic analyzer cards are not firmly seated in the HP 16500C or HP 16501A frame. Ensure that the cards are firmly seated. This error might occur if the target system is not running properly.
The error message “State Clock Violates Overdrive Specification” should occur only for HP 16510A/B, and HP 16511B Logic Analyzers with the Clock Period field set to <60 ns. If this error message is observed with the Clock Period set to >60 ns, you may have a faulty logic analyzer.
If a “don’t care” trigger condition is set, this message indicates: For an HP 16511B Logic Analyzer, only one of the two cards is receiving its state clock. Refer to “Slow or Missing Clock.” For an HP 16510A/B Logic Analyzer, the pattern duration is probably set to less than (<) instead of greater than (>).
Page 115
Application Notes Hewlett-Packard has prepared several application notes and product notes that show you how to get more out of your HP 16500C Logic Analysis System. Each note focuses on a particular application or problem, showing you the components of the problem, the approach required to solve it, the instrumentation, and the measurement results.
Page 116
Application Note 1244-2 5091-8839E Designing a Custom Interface Describes various HP tools for for a Logic Analyzer Using HP designing custom hardware and User-Definable Design Tools software interfaces to newer or less common chips and buses.
The field that al- acquisition Denotes one complete cycle of data gathering by a module. lows you to cancel an autoscale For example, in the HP 16532 oscillo- command. This field is particularly scope, one complete cycle gathers important if you inadvertently select...
Page 119
Glossary in the Delay field, and is set by using glitch A glitch is defined as two or the knob or the keypad. more transitions crossing the logic threshold between consecutive tim- deskewing To cancel or nullify the ing analyzer samples. effects of differences between two different internal delay paths for a high The most-positive portion of a...
Page 120
For the oscilloscope, module. It also allows you to choose system options and intermodule op- the field that sets the probe attenu- tions. ation factor. For example, in the HP 16532A, the input attenuation Glossary–3...
Page 121
Glossary can be set from 1:1 to 1000:1 in incre- sequence-else specification In ments of 1. the analyzers, the combination of pat- terns that will cause the trigger range terms In the analyzer, the sequencer to transition to another se- quencer state from the current state, range terms represent ranges of val- ues to be found on labeled sets of...
Page 122
See Also pattern terms, range terms, sequencer in the state analyzer. For and glitch/edge terms. example, the HP 16550A has twelve timing sequence levels Similar states in its trigger sequencer. Each to state sequence levels. However,...
Page 123
Glossary trigger Trigger is a reference memory to this point and fills remain- event around which you want to ing locations with subsequent states, then stops acquiring data. gather information. In the analyzer, you might want to trigger on a glitch in hardware or entry to a subroutine trigger point In the oscilloscope, in software.
Page 124
Glossary -002, etc), and states captured after the trigger are numbered with posi- tive numbers (001, 002, etc). vertical position See offset field. V/div See vertical sensitivity vertical sensitivity In the oscillo- scope, the voltage value that determines the amplitude of the waveform on the screen.
Page 131
Product Warranty No other warranty is About this edition expressed or implied. This Hewlett-Packard This is the HP 16500C Logic Hewlett-Packard product has a warranty Analysis System User’s specifically disclaims the against defects in material Guide. implied warranties of and workmanship for a period...