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MVME135
User manual
Motorola MVME135 User Manual
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Contents
Table of Contents
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Table of Contents
Table of Contents
Chapter 1 - General Information
I Ntroduct Ion
Features
Specifications
Cooling Requirements
FCC Comp 1 I Ance
General Description
Reference Documentation
TABLE 1-2. MVME135/136 Configurations
Manual Terminology
Chapter 2 - Hardware Preparation and Installation
Introduction
Unpacking Instructions
Hardware Preparation
Vmebus Lock for Vsbbus (Jl)
Bus Grant/Request Level Select (J2)
Factory Test Jumper (J5)
TABLE 2-1. Jumper Block Placements
RAM Acknowledge Mode (J6)
ROM Size Select (J7)
DRAM Address Multiplex Select (J8)
Local/Vmebus Timeout Disable (Jll)
DRAM Cycle Start Mode Select (J12)
Serial Port Cabling
To DB-25 Cable Connection
Vme Chassis Installation
Chapter 3 - Operating Instructions
Introduction
Front Panel
LED Indicators
ABORT Switch (Sl)
RESET Switch (S2)
Mapping Switch (S3)
System Configuration Switch (S4)
Memory Map and Map Decoder
Chapter 4 -Functionaldescription
ROM/PROM/EPROM/EEPROM Cycle Times
Vmebus Arbitration Time
Mc68851 Pmmu
VME SUBSYSTEM BUS (Vsbbus)
Dynamic Ram
Function Code Assignments
MC68851 Breakpoint Support
FIGURE 4-3. CPU Space Type Field Encoding
TABLE 4-2. Function Code Assignments
MC68851 Breakpoint Operation
FIGURE 4-4. Breakpoint Acknowledge Cycle Address Encoding
MC68851 Breakpoint Architecture
Figure 4-5. Breakpoint Registers
FIGURE 4-6. Breakpoint Acknowledge Data Register Format
FIGURE 4-7. Breakpoint Acknowledge Control Register Format
Access Level Control
TABLE 4-3. ALC Interface Registers Map
TABLE 4-4. MC68851 Coprocessor Interface Register Map
TABLE 4-5. MC68881 Coprocessor Interface Register Map
TABLE 4-6. Interrupt Handler Priority Assignments
Onboard Rom/Prom/Eprom
Dual Serial Ports
Mvme135/136 Timer
Local Control/Status Registers
Status Register Format and Functions
Control Register Format and Functions
1Ul Tiprocessor Control/Status Registers (Mpcsr)
TABLE 4-7. Multiprocessor Control/Status Registers
TABLE 4-8. Mapping on the Vmebus
Base Address Selection
Vsbbus CONTROL/STATUS REGISTER
FIGURE 4-12. MPCSR and DRAM Address Mapping
Configuring a Vme Subsystem Bus
Chapter 5 - Support Information
Introduction
Interconnection Signals
TABLE 5-1. Connector PI Interconnect Signals
Connector PI Interconnect Signals
Connector P2 Interconnect Signals
TABLE 5-2. Connector P2 Interconnect Signal S
TABLE 5-3. Connector J3 Interconnect Signals
Connector J4 Interconnect Signals
TABLE 5-4. Connector J4 Interconnect Signals
Connector J9 Interconnect Signals
Parts List
TABLE 5-7. MVME135/136 Parts List
Appendix A - Mvme135/135-1/136 Pal2 Source Listing
Appendix B - Mvme135A/136A Pal2 Source Listing
Appendix C - Mvme135/136 Local Memory Map
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This manual is also suitable for:
Mvme135a
Mvme135-1
Mvme136
Mvmel36a
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